mirror of
https://github.com/gryf/wmtemp.git
synced 2026-01-03 21:24:10 +01:00
Attempt to use nvclock code for reading GPU temperature, since running
nvidia-settings couple of times for a second is highly inefficient.
This commit is contained in:
341
nvclock/nvclock.h
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341
nvclock/nvclock.h
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/* NVClock 0.8 - Linux overclocker for NVIDIA cards
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*
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* site: http://nvclock.sourceforge.net
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*
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* Copyright(C) 2001-2007 Roderick Colenbrander
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifndef NVCLOCK_H
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#define NVCLOCK_H
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#define MAX_CARDS 4
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#define NV5 (1<<0)
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#define NV10 (1<<1)
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#define NV17 (1<<2)
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#define NV1X (NV10 | NV17)
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#define NV20 (1<<3)
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#define NV25 (1<<4)
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#define NV2X (NV20 | NV25)
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#define NV30 (1<<5)
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#define NV31 (1<<6)
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#define NV35 (1<<7)
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#define NV3X (NV30 | NV31 | NV35)
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#define NV40 (1<<8)
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#define NV41 (1<<9)
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#define NV43 (1<<10)
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#define NV44 (1<<11)
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#define NV46 (1<<12)
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#define NV47 (1<<13)
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#define NV49 (1<<14)
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#define NV4B (1<<15)
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#define C51 (1<<16)
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#define NV4X (NV40 | NV41 | NV43 | NV44 | NV46 | NV47 | NV49 | NV4B | C51)
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#define NV50 (1<<17)
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#define G84 (1<<18)
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#define G86 (1<<19)
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#define NV5X (NV50 | G84 | G86)
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#define NV_ERR_NO_DEVICES_FOUND 1
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#define NV_ERR_NO_DRIVERS_FOUND 2
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#define NV_ERR_NOT_ENOUGH_PERMISSIONS 3
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#define NV_ERR_OTHER 4
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#define GPU_OVERCLOCKING (1<<0)
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#define MEM_OVERCLOCKING (1<<1)
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#define COOLBITS_OVERCLOCKING (1<<2)
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#define PIPELINE_MODDING (1<<3)
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#define GPU_FANSPEED_MONITORING (1<<4) /* Fanspeed monitoring based on fan voltage */
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#define BOARD_TEMP_MONITORING (1<<5) /* Board temperature; not available using NVSensor */
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#define GPU_TEMP_MONITORING (1<<6) /* Internal GPU temperature */
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#define I2C_FANSPEED_MONITORING (1<<7) /* Fanspeed monitoring using a i2c sensor chip */
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#define I2C_AUTOMATIC_FANSPEED_CONTROL (1<<8) /* The sensor supports automatic fanspeed control */
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#define SMARTDIMMER (1<<9) /* Smartdimmer support for mobile GPUs */
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#define GPU_ID_MODDING (1<<10) /* PCI id modding is supported on this board */
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#define STATE_LOWLEVEL (1<<0)
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#define STATE_2D (1<<1)
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#define STATE_3D (1<<2)
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#define STATE_BOTH (STATE_2D | STATE_3D)
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/* Define some i2c types, so that we don't depend on additional headers when using NVClock as a library */
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#ifndef _XF86I2C_H
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typedef void* I2CBusPtr;
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typedef void* I2CDevPtr;
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#endif
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typedef struct
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{
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void *next;
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char *section;
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char *name;
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unsigned int value;
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} cfg_entry;
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typedef enum
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{
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SDR,
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DDR
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} mem_type;
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typedef enum
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{
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UNKNOWN,
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DESKTOP,
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NFORCE,
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MOBILE
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} gpu_type;
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struct pci_ids {
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short id;
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const char *name;
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gpu_type gpu;
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};
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struct voltage
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{
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unsigned char VID;
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float voltage;
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};
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struct performance
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{
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int nvclk;
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int delta;
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int memclk;
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int shaderclk;
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int fanspeed;
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float voltage;
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};
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struct vco
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{
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unsigned int minInputFreq, maxInputFreq;
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unsigned int minFreq, maxFreq;
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unsigned char minN, maxN;
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unsigned char minM, maxM;
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};
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struct pll
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{
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unsigned int reg;
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unsigned char var1d;
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unsigned char var1e;
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struct vco VCO1;
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struct vco VCO2;
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};
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struct sensor
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{
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int slope_div;
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int slope_mult;
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int diode_offset_div;
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int diode_offset_mult;
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int temp_correction;
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};
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struct nvbios
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{
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char *signon_msg;
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char *vendor_name;
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unsigned short device_id;
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char* version;
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unsigned char major;
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unsigned char minor;
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short volt_entries;
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short volt_mask;
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struct voltage volt_lst[4];
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short perf_entries;
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struct performance perf_lst[3];
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short pll_entries;
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struct pll pll_lst[8];
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struct sensor sensor_cfg;
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/* Cache the 'empty' PLLs, this is needed for PLL calculation */
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unsigned int mpll;
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unsigned int nvpll;
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unsigned int spll;
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unsigned int pipe_cfg; /* Used to cache the NV4x pipe_cfg register */
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};
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typedef struct {
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char *card_name; /* Name of the card */
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short number; /* internal card number; used by the gtk client and set_card to see if we really need to switch cards */
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short caps; /* A bitmask that contains what card features are supported; A normal gpu can do gpu/memory overclocking but a nforce can do only gpu. */
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short device_id;
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int arch; /* Architecture NV10, NV15, NV20 ..; for internal use only as we don't list all architectures */
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unsigned int reg_address;
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char *dev_name; /* /dev/mem or /dev/nvidiaX */
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unsigned short devbusfn;
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int irq; /* We might need the IRQ to sync NV-CONTROL info with nvclock */
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short base_freq;
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gpu_type gpu; /* Tells what type of gpu is used: mobile, nforce .. */
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short debug; /* Enable/Disable debug information */
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struct nvbios *bios; /* pointer to bios information */
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int have_coolbits; /* Tells if Coolbits (NV-CONTROL) is enabled */
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int state; /* Tells which clocks to change for NV-CONTROL: 2D, 3D or BOTH */
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/* card registers */
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int mem_mapped; /* Check for set_card to see if the memory has been mapped or not. */
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volatile unsigned int *PFB;
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volatile unsigned int *PBUS;
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volatile unsigned int *PMC;
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volatile unsigned int *PRAMDAC;
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volatile unsigned int *PEXTDEV;
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volatile unsigned char *PROM; /* Nvidia bios */
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volatile unsigned char *PCIO;
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/* Overclock range of speeds */
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short nvclk_min;
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short nvclk_max;
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short memclk_min;
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short memclk_max;
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/* Various GeforceFX/Geforce6 boards use different clocks in 3d. We need to store those clocks */
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short nvclk_3d;
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short memclk_3d;
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/* Card info */
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short (*get_gpu_architecture)();
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short (*get_gpu_revision)();
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int (*set_gpu_pci_id)(short id); /* Changes the least significant 2 or 4 bits of the pci id */
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/* Memory info */
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int mem_type; /* needs to replace memory_type ?? */
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char* (*get_memory_type)(); /* Memory type: SDR/DDR */
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short (*get_memory_width)(); /* Memory width 64bit or 128bit */
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short (*get_memory_size)(); /* Amount of memory between 4 and 128 MB */
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/* BUS info: PCI/PCI-Express/AGP */
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char* (*get_bus_type)(); /* Bus type: AGP/PCI/PCI-Express */
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short (*get_bus_rate)(); /* Current AGP rate: 1, 2, 4 or 8; PCI-Express: 1-32X*/
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/* AGP */
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char* (*get_agp_status)(); /* Current AGP status: Enabled/Disabled */
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char* (*get_agp_fw_status)(); /* Current FW status: Enabled/Disabled */
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char* (*get_agp_sba_status)(); /* Current SBA status: Enabled/Disabled */
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char* (*get_agp_supported_rates)(); /* Supported AGP rates */
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/* PCI-Express */
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short (*get_pcie_max_bus_rate)(); /* Get the maximum PCI-E busrate */
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/* Hardware monitoring */
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short num_busses; /* Number of available i2c busses */
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I2CBusPtr busses[3]; /* I2C busses on the videocard; this bus is needed for communication with sensor chips */
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I2CDevPtr sensor; /* When a sensor chip is available, this device pointer can be used to access it */
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char *sensor_name; /* Name of the sensor; although sensor contains the name too, we add sensor_name because of the builtin temperature sensor used on various NV4x cards */
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int (*get_board_temp)(I2CDevPtr dev); /* Temperature of the sensor chip or for example the ram chips */
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int (*get_gpu_temp)(I2CDevPtr dev); /* Internal gpu temperature */
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float (*get_fanspeed)(); /* Get the speed in % from the pwm register in %*/
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void (*set_fanspeed)(float speed); /* Set the speed of the fan using the pwm register of the gpu */
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int (*get_i2c_fanspeed_mode)(I2CDevPtr dev); /* Advanced sensors like the ADT7473 support manual and automatic fanspeed adjustments */
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void (*set_i2c_fanspeed_mode)(I2CDevPtr dev, int mode); /* Set the fanspeed mode to manual or automatic; Note that a pwm fanspeed change already causes a switch to implicit switch to manual, so this function should only be used to deactivate manual mode */
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int (*get_i2c_fanspeed_rpm)(I2CDevPtr dev); /* Speed of the fan in rpm */
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float (*get_i2c_fanspeed_pwm)(I2CDevPtr dev); /* Duty cycle of the pwm signal that controls the fan */
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int (*set_i2c_fanspeed_pwm)(I2CDevPtr dev, float speed); /* By adjusting the duty cycle of the pwm signal, the fanspeed can be adjusted. */
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/* Pipeline stuff for NV4x; On various Geforce6 boards disabled pixel/vertex pipelines can be re-enabled. */
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int (*get_default_mask)(char *pmask, char *vmask);
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int (*get_hw_masked_units)(char *pmask, char *vmask);
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int (*get_sw_masked_units)(char *pmask, char *vmask);
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int (*get_pixel_pipelines)(char *mask, int *total);
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void (*set_pixel_pipelines)(unsigned char mask);
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int (*get_vertex_pipelines)(char *mask);
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void (*set_vertex_pipelines)(unsigned char mask);
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/* NV5x (Geforce8) shader stuff */
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float (*get_shader_speed)(); /* NV5X-only */
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void (*set_shader_speed)(unsigned int clk); /* NV5X-only */
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void (*reset_shader_speed)();
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int (*get_stream_units)(char *mask, char *default_mask);
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int (*get_rop_units)(char *mask, char *default_mask);
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/* Smartdimmer (adjustment of the brigthenss of the backlight on Laptops) */
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int (*get_smartdimmer)();
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void (*set_smartdimmer)(int level);
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/* Overclocking */
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volatile unsigned int mpll; /* default memory speed */
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volatile unsigned int mpll2;
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volatile unsigned int nvpll; /* default gpu speed */
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volatile unsigned int nvpll2;
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void (*set_state)(int state);
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float (*get_gpu_speed)();
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void (*set_gpu_speed)(unsigned int nvclk);
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float (*get_memory_speed)();
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void (*set_memory_speed)(unsigned int memclk);
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void (*reset_gpu_speed)();
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void (*reset_memory_speed)();
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/* Debug */
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void (*get_debug_info)();
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} NVCard, *NVCardPtr;
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typedef struct
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{
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int num_cards;
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NVCard card[MAX_CARDS];
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cfg_entry *cfg;
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void *dpy; /* X display needed for the NV-CONTROL backend */
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char *path; /* path to home directory */
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int nv_errno;
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char *nv_err_str;
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} NVClock;
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extern NVClock nvclock;
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extern NVCard* nv_card;
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#ifdef __cplusplus
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extern "C" {
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#endif
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int init_nvclock();
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int set_card(int number);
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void unset_card();
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/* config file stuff */
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int open_config();
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int create_config(char *file);
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int read_config(cfg_entry **cfg, char *file);
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int parse_config(char *file);
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void write_config(cfg_entry *cfg, char *file);
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void add_entry(cfg_entry **cfg, char *section, char *name, int value);
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void change_entry(cfg_entry **cfg, char *section, char *name, int value);
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cfg_entry* lookup_entry(cfg_entry **cfg, char *section, char *name);
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void destroy(cfg_entry **cfg);
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/* error handling */
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char *get_error(char *buf, int size);
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void set_error(int code);
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void set_error_str(const char *err);
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/* utility functions */
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int convert_gpu_architecture(short arch, char *buf);
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void convert_unit_mask_to_binary(char mask, char hw_default, char *buf);
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#ifdef __cplusplus
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};
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#endif
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#endif /* NVCLOCK_H */
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