mirror of
https://github.com/gryf/wmtemp.git
synced 2025-12-18 03:50:27 +01:00
Attempt to use nvclock code for reading GPU temperature, since running
nvidia-settings couple of times for a second is highly inefficient.
This commit is contained in:
335
nvclock/overclock.c
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335
nvclock/overclock.c
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/* NVClock 0.8 - Linux overclocker for NVIDIA cards
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*
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* site: http://nvclock.sourceforge.net
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*
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* Copyright(C) 2001-2005 Roderick Colenbrander
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include "backend.h"
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static int CalcSpeed(int base_freq, int m, int n, int p)
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{
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return (int)((float)n/(float)m * base_freq) >> p;
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}
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/* Generic clock algorithm for all cards upto the Geforce4 */
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float GetClock(int base_freq, unsigned int pll)
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{
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int m, n, p;
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m = pll & 0xff;
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n = (pll >> 8) & 0xff;
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p = (pll >> 16) & 0x0f;
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if(nv_card->debug)
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printf("m=%d n=%d p=%d\n", m, n, p);
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return (float)CalcSpeed(base_freq, m, n, p)/1000;
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}
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/* Calculate the requested speed. */
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static void ClockSelect(int base_freq, int clockIn, int *PLL)
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{
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int m, n, p, bestm, bestn, bestp;
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int diff, diffOld, mlow, mhigh, nlow, nhigh, plow, phigh;
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diffOld = clockIn;
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if(base_freq == 14318)
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{
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mlow = 7;
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mhigh = 14;
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nlow = 14;
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nhigh = 255;
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}
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else
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{
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mlow = 6;
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mhigh = 13;
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nlow = 14;
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nhigh = 255;
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}
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if(clockIn > 250000)
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{
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mlow = 1;
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mhigh = 6;
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nlow = 14;
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nhigh = 93;
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}
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if(clockIn > 340000)
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{
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/* When DDR memory is used we should perhaps force mhigh to 1, since
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* on some cards the framebuffer needs to be reinitialized and image corruption
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* can occur.
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*/
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mlow = 1;
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mhigh = 2;
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nlow = 14;
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nhigh = 93;
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}
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/* postdivider locking to improve stability.
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* in the near future we will provide some tuning options for the
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* overclocking algorithm which will extend this.
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*/
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plow = (*PLL >> 16) & 0x0f;
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phigh = (*PLL >> 16) & 0x0f;
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/*
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Calculate the m and n values. There are a lot of values which give the same speed;
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We choose the speed for which the difference with the request speed is as small as possible.
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*/
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for(p = plow; p <= phigh; p++)
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{
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for(m = mlow; m <= mhigh; m++)
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{
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for(n = nlow; n <= nhigh; n++)
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{
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diff = abs((int)(clockIn - CalcSpeed(base_freq, m, n, p)));
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/* When the new difference is smaller than the old one, use this one */
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if(diff < diffOld)
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{
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diffOld = diff;
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bestm = m;
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bestn = n;
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bestp = p;
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#if 0
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/* When the difference is 0 or less than .5% accept the speed */
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if(((diff == 0) || ((float)diff/(float)clockIn <= 0.005)))
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{
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*PLL = ((int)bestp << 16) + ((int)bestn << 8) + bestm;
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return;
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}
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#endif
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}
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}
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}
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}
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*PLL = ((int)bestp << 16) + ((int)bestn << 8) + bestm;
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return;
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}
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static void set_gpu_speed(unsigned int clk)
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{
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int PLL;
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/* MHz -> KHz */
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clk *= 1000;
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PLL = nv_card->PRAMDAC[0x500/4];
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/* HERE the new clocks are selected (in KHz). */
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ClockSelect(nv_card->base_freq, clk, &PLL);
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/* Unlock the programmable NVPLL/MPLL */
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nv_card->PRAMDAC[0x50c/4] |= 0x500;
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/* Overclock */
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nv_card->PRAMDAC[0x500/4] = PLL;
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}
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static void set_memory_speed(unsigned int clk)
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{
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int PLL = nv_card->PRAMDAC[0x504/4];
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/* MHz -> KHz */
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clk *= 1000;
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/* This is a workaround meant for some Geforce2 MX/Geforce4 MX cards
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* using SDR memory. Gf2MX/Gf4MX cards use 4x16 SDR memory report
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* twice as high clockspeeds. I call that "fake ddr".
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* By detecting the memory type, pci id and clockspeed we check
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* if this occurs. It is a workaround.
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*/
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if(nv_card->mem_type == SDR && ( nv_card->device_id == 0x110 || nv_card->device_id == 0x111
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|| nv_card->device_id == 0x172 || nv_card->device_id == 0x17a))
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{
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if(GetClock(nv_card->base_freq, PLL) > 280) clk *= 2;
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}
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/* Here the clocks are selected in kHz */
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ClockSelect(nv_card->base_freq, clk, &PLL);
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/* Unlock the programmable NVPLL/MPLL */
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nv_card->PRAMDAC[0x50c/4] |= 0x500;
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/* Overclock */
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nv_card->PRAMDAC[0x504/4] = PLL;
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}
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static float get_gpu_speed()
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{
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int pll = nv_card->PRAMDAC[0x500/4];
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/* Unlock the programmable NVPLL/MPLL */
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nv_card->PRAMDAC[0x50c/4] |= 0x500;
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if(nv_card->debug == 1)
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{
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printf("NVPLL_COEFF=%08x\n", pll);
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}
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return (float)GetClock(nv_card->base_freq, pll);
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}
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static float get_memory_speed()
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{
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int factor = 1;
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int pll = nv_card->PRAMDAC[0x504/4];
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/* Unlock the programmable NVPLL/MPLL */
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nv_card->PRAMDAC[0x50c/4] |= 0x500;
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/* This is a workaround meant for some Geforce2 MX/Geforce4 MX cards
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* using SDR memory. Gf2MX/Gf4MX cards use 4x16 SDR memory report
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* twice as high clockspeeds. I call that "fake ddr".
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* By detecting the memory type, pci id and clockspeed we check
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* if this occurs. It is a workaround. We divide the memclk later by 2.
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*/
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if(nv_card->mem_type == SDR && ( nv_card->device_id == 0x110 || nv_card->device_id == 0x111 ||
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nv_card->device_id == 0x172 || nv_card->device_id == 0x17a || nv_card->device_id == 0x182 \
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|| nv_card->device_id == 0x183))
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{
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if(GetClock(nv_card->base_freq, pll) > 280)
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{
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factor = 2;
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}
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}
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if(nv_card->debug == 1)
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{
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printf("MPLL_COEFF=%08x\n", nv_card->PRAMDAC[0x504/4]);
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}
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return ((float)GetClock(nv_card->base_freq, pll)) / factor;
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}
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static float nforce_get_memory_speed()
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{
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unsigned short p = (pciReadLong(0x3, 0x6c) >> 8) & 0xf;
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if(!p) p = 4;
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return 400.0 / (float)p;
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}
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static void reset_gpu_speed()
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{
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/* Unlock the programmable NVPLL/MPLL */
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nv_card->PRAMDAC[0x50c/4] |= 0x500;
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/* Set the gpu speed */
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nv_card->PRAMDAC[0x500/4] = nv_card->nvpll;
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}
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static void reset_memory_speed()
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{
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/* Unlock the programmable NVPLL/MPLL */
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nv_card->PRAMDAC[0x50c/4] |= 0x500;
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/* Don't overclock the memory of integrated GPUs */
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if(nv_card->gpu == NFORCE)
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return;
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/* Set the memory speed */
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nv_card->PRAMDAC[0x504/4] = nv_card->mpll;
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}
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static void nv_set_state(int state)
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{
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}
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void nv_init(void)
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{
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float memclk, nvclk;
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/* Get the base frequency */
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nv_card->base_freq = (nv_card->PEXTDEV[0x0000/4] & 0x40) ? 14318 : 13500;
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if(nv_card->arch & (NV17 | NV25))
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{
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if (nv_card->PEXTDEV[0x0000/4] & (1<<22))
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nv_card->base_freq = 27000;
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}
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nv_card->set_state = nv_set_state;
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nv_card->get_gpu_speed = get_gpu_speed;
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nv_card->set_gpu_speed = set_gpu_speed;
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nv_card->get_memory_speed = get_memory_speed;
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nv_card->set_memory_speed = set_memory_speed;
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nv_card->reset_gpu_speed = reset_gpu_speed;
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nv_card->reset_memory_speed = reset_memory_speed;
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/* Register I2C busses for hardware monitoring purposes */
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if(nv_card->busses[0] == NULL)
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{
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nv_card->num_busses = 2;
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nv_card->busses[0] = NV_I2CCreateBusPtr("BUS0", 0x3e); /* available on riva128 and higher */
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nv_card->busses[1] = NV_I2CCreateBusPtr("BUS1", 0x36); /* available on rivatnt hardware and higher */
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/* There's an extra bus available on geforce4mx/ti, geforcefx and geforce6 cards.
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/ The check below looks for geforce4mx/geforcefx/geforce6 architecture.
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*/
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if(nv_card->arch & (NV17 | NV25 | NV3X | NV4X))
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{
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nv_card->num_busses = 3;
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nv_card->busses[2] = NV_I2CCreateBusPtr("BUS2", 0x50);
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}
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}
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/* Mobile GPU check; we don't want to overclock those unless the user wants it */
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if(nv_card->gpu == MOBILE)
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{
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nv_card->caps = ~(~nv_card->caps | GPU_OVERCLOCKING | MEM_OVERCLOCKING);
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}
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else if(nv_card->gpu == NFORCE)
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{
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/* Only support gpu overclocking because the memory is normal system memory of which we can't adjust the clocks */
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nv_card->caps |= GPU_OVERCLOCKING;
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nv_card->get_memory_speed = nforce_get_memory_speed;
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nv_card->set_memory_speed = NULL;
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nv_card->reset_memory_speed = NULL;
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}
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else
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nv_card->caps |= (GPU_OVERCLOCKING | MEM_OVERCLOCKING);
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/* Set the speed range */
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memclk = GetClock(nv_card->base_freq, nv_card->mpll);
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nvclk = GetClock(nv_card->base_freq, nv_card->nvpll);
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nv_card->memclk_min = (short)(memclk * .75);
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nv_card->memclk_max = (short)(memclk * 1.5);
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nv_card->nvclk_min = (short)(nvclk * .75);
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nv_card->nvclk_max = (short)(nvclk * 1.5);
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/* Find out what memory is being used */
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nv_card->mem_type = (nv_card->PFB[0x200/4] & 0x01) ? DDR : SDR;
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/* Hack.
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* Nvidia was so nice to ship support both DDR and SDR memory on some gf2mx and gf4mx cards :(
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* Because of this the speed ranges of the memory speed can be different.
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* Check if the card is a gf2mx/gf4mx using SDR and if the speed is "too" high.
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* Then adjust the speed range.
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*/
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if((nv_card->device_id == 0x110 || nv_card->device_id == 0x111 \
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|| nv_card->device_id == 0x172 || nv_card->device_id == 0x182 \
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|| nv_card->device_id == 0x183) && ((nv_card->PFB[0x200/4] & 0x1) == SDR) && memclk > 280)
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{
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nv_card->memclk_min /= 2;
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nv_card->memclk_max /= 2;
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}
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}
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