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124 lines
3.6 KiB
C
124 lines
3.6 KiB
C
/* NVClock 0.8 - Linux overclocker for NVIDIA cards
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*
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* site: http://nvclock.sourceforge.net
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*
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* Copyright(C) 2001-2005 Roderick Colenbrander
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*
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* W83L785R hardware monitoring
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*/
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#include <string.h>
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#include "i2c.h"
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#include "nvclock.h"
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/* various defines for register offsets and such are needed */
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#define W83L785R_REG_LOCAL_TEMP 0x26
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#define W83L785R_REG_LOCAL_TEMP_OFFSET 0x85
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#define W83L785R_REG_REMOTE_TEMP 0x27
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#define W83L785R_REG_REMOTE_TEMP_OFFSET 0x86
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#define W83L785R_REG_FAN1_COUNT 0x28
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#define W83L785R_REG_FAN2_COUNT 0x29
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#define W83L785R_REG_FAN_DIVISOR 0x47 /* bit 2-0 for fan1; bit 6-4 for fan2 */
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#define W83L785R_REG_MAN_ID_L 0x4c
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#define W83L785R_REG_MAN_ID_H 0x4d
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#define W83L785R_REG_CHIP_ID 0x4e
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#define W83L785R_REG_FAN1_PWM 0x81
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#define W83L785R_REG_FAN2_PWM 0x83
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/* This function should return the chip type .. */
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int w83l785r_detect(I2CDevPtr dev)
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{
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I2CByte man_id_l, man_id_h, chip_id;
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xf86I2CReadByte(dev, W83L785R_REG_MAN_ID_L, &man_id_l);
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xf86I2CReadByte(dev, W83L785R_REG_MAN_ID_H, &man_id_h);
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xf86I2CReadByte(dev, W83L785R_REG_CHIP_ID, &chip_id);
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/* Winbond chip */
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if((man_id_l == 0xa3) && (man_id_h == 0x5c))
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{
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if((chip_id & 0xfe) == 0x60)
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{
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dev->chip_id = W83L785R;
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dev->chip_name = (char*)strdup("Winbond W83L785R");
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return 1;
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}
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}
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return 0;
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}
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int w83l785r_get_board_temp(I2CDevPtr dev)
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{
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I2CByte temp, offset;
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xf86I2CReadByte(dev, W83L785R_REG_LOCAL_TEMP, &temp);
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xf86I2CReadByte(dev, W83L785R_REG_LOCAL_TEMP_OFFSET, &offset);
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return temp + offset;
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}
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int w83l785r_get_gpu_temp(I2CDevPtr dev)
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{
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I2CByte temp, offset;
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xf86I2CReadByte(dev, W83L785R_REG_REMOTE_TEMP, &temp);
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xf86I2CReadByte(dev, W83L785R_REG_REMOTE_TEMP_OFFSET, &offset);
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return temp + offset;
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}
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int w83l785r_get_fanspeed_rpm(I2CDevPtr dev)
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{
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I2CByte count, divisor;
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xf86I2CReadByte(dev, W83L785R_REG_FAN1_COUNT, &count);
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xf86I2CReadByte(dev, W83L785R_REG_FAN_DIVISOR, &divisor);
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divisor &= 0x7;
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/* By default count useally is 153, it seems that a value of 255 means that something is wrong.
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/ For example it retuns this value on boards on which the fan is replaced with a heatpipe and because
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/ of that the fan was removed.
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*/
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if(count == 0xff)
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return 0;
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return 1350000/(count * (1<<divisor));
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}
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float w83l785r_get_fanspeed_pwm(I2CDevPtr dev)
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{
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I2CByte value;
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xf86I2CReadByte(dev, W83L785R_REG_FAN1_PWM, &value);
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return (float)(0xff-value)*100/256;
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}
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int w83l785r_set_fanspeed_pwm(I2CDevPtr dev, float speed)
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{
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/* We have 8 bits to adjust the duty cycle, to set a speed of 100% we need to write a value of 0
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/ as the register is inverted. (0 means 100% and 0xff means 0)
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/
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/ Below we scale the speed (in %) with 255/100 to turn '100%' into the max value 255.
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*/
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I2CByte value = (100 - (int)speed) * 255/100;
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xf86I2CWriteByte(dev, W83L785R_REG_FAN1_PWM, value);
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xf86I2CReadByte(dev, W83L785R_REG_FAN1_PWM, &value);
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return 1;
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}
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